01047nam a2200301 c 4500001001300000005001500013008004100028020003100069035001800100049002800118052001600146056001300162082001700175245015900192260003000351300002800381504003900409650004600448650004700494700005300541700001400594700001400608700001400622700003600636700004800672700001400720950001100734KMO20061819420180807142731060516s2006    ulka          001   kor    a8970933220g93560:c\20000  aUB200601692640 lEM3582798lEM3582799c201a569.3b6-17  a569.3240 a621.381522120a(디지털 시스템 설계를 위한) VHDL의 기본과 활용/d류장렬,e최병갑,e이부형,e김기래,e엄우용,e구경완,e박재성 공저  a서울:b광문각,c2006  a427 p.:b삽화;c26 cm  a참고문헌: p. 427, 색인수록 8a디지털 회로[--回路]0KSH1998027666 8a회로 설계[回路設計]0KSH20010156701 a류장렬,g柳章烈,d1955-0KAC2013237604aut1 a최병갑1 a이부형1 a김기래1 a엄우용,d1967-0KAC2015086681 a구경완,g丘庚完,d1961-0KAC2016371531 a박재성0 b\20000