01002nam a2200181 c 4500001001300000005001500013008004100028040001100069041001300080052003100093245019500124300002300319545007900342653017600421700005300597773014600650900002400796KSI00036789920050428173934050419s2002    ulk           000   kor    a0110010 akorbeng01a004.05b한613ㅈㅂc9(3)00aPerfect shuffle에 의한 reed-muller 전개식에 관한 다치 논리회로의 설계=xDesign of multiple-valued logic circuits on reed-muller expansions using perfect shuffle/d성현경  ap. 271-280;c30 cm  a성현경, 종신회원:상지대학교 컴퓨터ㆍ정보공학부 교수  a다치논리회로aKronecker 곱aPerfect shufflea다치 reed-muller 전개식aMultiple-valued logic circuitsaKronecker productaMultiple-valued reed-muller expansions1 a성현경,g成賢慶,d1955-0KAC2018043564aut0 t정보처리학회논문지.A.d한국정보처리학회.g9-A권 3호(2002년 9월), p. 271-280q9-A:3<271w(011001)KSE200101428,x1598-283110aSeong, Hyeon-Kyeong